Tutorial:ISPASS 2012

Location and Date

The Sniper Tutorial will be held at ISPASS 2012 in New Brunswick, NJ on Sunday, April 1st.

Abstract

Two major trends in high-performance computing, namely, larger numbers of cores and the growing size of on-chip cache memory, are creating significant challenges for evaluating the design space of future processor architectures. Fast, scalable and accurate simulations are needed to allow for sufficient exploration of large multi-core systems within a limited simulation time budget. Through the use of high-abstraction analytical models with fast parallel simulation in the Sniper simulator, computer architects can trade off accuracy with simulation speed to allow for longer application runs, covering a larger portion of the hardware design space.

The purpose of this tutorial is to introduce both the main features of the Sniper simulator, as well as provide detail into the use of the simulator itself. Specifically, this tutorial will provide an in-depth look into the theory and implementation of the interval core model and CPI-stack generation. We will also highlight features like full DVFS support, scripting and program-to-simulator communication and provide an overview of the various component models and simulator configurability and flexibility.

Sniper’s key features are:

• The interval core model to raise the level of abstraction in multi-core simulation
• Parallel simulation on multi-core host hardware
• Runs multi-threaded shared-memory x86 workloads
• Achieves good simulation speed, up to 2 MIPS
• Validated against real hardware

Topics to be Covered

• Sniper simulator overview
• Interval Model in depth
• Simulator HW features and components
• Simulator SW features
  • DVFS control, scripting interfaces, etc.
• Validation results
• Hands-on demonstration